UPDATED: As a follow up, I've now done my own test module, and had some interesting results which have clarified things for me - and having spoken with support who have confirmed the behaviour is based around modelling real world analogue units, now understand the behaviour.
I have attached the screen shot to show the behaviour, and also the module so that people can try to see it easily for yourselves.
Anyway, in summary, the status from the ADSR for each stage as per the setting (i.e. 30ms in my example). The thing that was confusing me when looking at it just on the oscilloscope (when I was testing my latest updates for my modules to check their timings) is that by 1/2 way through the Decay and Sustain the voltage has fallen to just 0.019V over the based (i.e. 19mV for Release, and 2.519V for Decay i.e. 2.5V sustain level + 19mV) which looks (on the oscilloscope with the resolution you get from it) as being so close to 0V as looking like it had already finished.

- Screen Shot for ADSR Issue.png (273.16 KiB) Viewed 7711 times